pMOSFET preamplifier

I am designing a driver for an H Bridge amplifier. I want the amplifier to be driven by two PWM signals, and be capable of being completely off if no signal is present. This is possible if each of the four H-Bridge inputs are taken as independent, with the two inputs at the opposite corners as binary opposites of each other.

Using the MOSFET preamplifier, I have one quarter the signal I need. The other quarter I get from logically inverting the signal. I can do this in one of many ways, the most common is using another n or p channel amplifier. Using an n channel amplifier, like I did in the previous post, might be the most common. The n and p channel MOSFET has many different characteristics, which makes it more difficult to incorporate in the design. If I wanted the total current consumption to be minimal during off time, I would use a pMOS to impelement the second amplifier, like the following picture.

I could use two n channel MOS transistors, to achieve the same voltages. The reason I like this better for some applications is because of the region of operation. PWM low is no signal. Both T1 and T2 are in cut off when the PWM is low, in this configuration. Zero is the most common signal for this application. It would make sense to have as little current as possible when the device is considered off. Being a conscientious engineer, I think it important to consider these options.

I have chosen the SI2301. It has a footprint similar to that of the one I chose for the n channel amplifier. They both are for high speed switching, very low threshold, and useful as a general purpose switch. Rds_on are different. The switching speed is a touch slower, allowing for a 15 MHz PWM speed. Having only an n channel amplifier set up would allow for a 37 MHz speed.

So this is my trade off, keep speed high and maintain some simplicity, or be able to keep the current level really low when the device is not receiving any signal. The thing is, I am purposefully keeping the current very low, to minimize any drain source voltage, so is this an actual advantage?

http://www.linkedin.com/in/andrewvall
http://www.elance.com/provprofile?userid=184021&rid=3QOZ
Electrical Design Engineer, Minneapolis, Minnesota