MOSFET Power Amplifier

In circuit design, power efficiency is a tricky business. The key is to put all of the power originating from the power supply to the load. The trouble is, active circuits do not do that very well over their whole range. Ideally, you want the power dissipated from the transistor to be zero for most of the time. Power is current times voltage. The most efficient amplifier have zero current at maximum voltage, and zero voltage at maximum current. This is the essence of why using a Class D power amplifier or an H bridge is such a good idea. Except, the amplifier is only as good as its components.

The specifications for this design are as follows. It is to have only one power supply, 5 Volts, and a ground. This means that 5 Volts at the gate of the n channel enhancement mode MOSFET should turn the transistor on all the way, and 0 Volts should turn the p channel enhancement mode MOSFET all the way. The MOSFET should have zero volts across from drain to source, when it has been turned on.

The current needed through the amplifier depends on the current through the load. For instance, a speaker usually has an internal resistance of 8 Ohms. Most speakers are rated at a given power level, like 100 Watts.

The current through the load is the square root of the watts divided by the resistance. The current a 100 Watt 8 Ohm speaker is rated for is 3.5 Amps. The resulting voltage across the load is 28 V. Thus, I have misspoken. The voltage level must be boosted to over 28 Volts to drive the load at 3.5 Amps. Thus, the gate voltage for the p channel MOSFET must also be boosted to 28 Volts, or else the voltage from the gate to source will never be equal to zero.

This is the operation of the circuit. Transistor 11 and 12 must never be on at the same time. Same holds true for 21 and 22. The load gets current if 11 and 22 are both on, or 12 and 21 are both on. The current directions for each are opposite of each other. Voltage source 1 and 3 are opposites of each other. Same with Voltage source 2 and 4. They can be driven by the same PWM signal, just so one is high while the other is low.

The next task is to find a way to get 3.5 Amps through the transistors. Since the linear or triode region of operation is the most interest to me, I should start there.

 

For n channel enhancement mode MOSFET

For p channel enhancement mode MOSFET

So, there lies the problem. The smaller the drain source voltage is, the smaller the drain current. The electron mobility and the oxide capacitance are essentially the same for most silicon devices The electron mobility depends on temperature and impurity concentrations. The electron mobility is 40% less for p channel devices. The largest contributing factor is the width to length ratio.

Because I know the current, the gate source voltage, the approximate drain source voltage, and many of the other parameters I want, I can solve for the width to length ratio start designing the other components for the power dissipation. Unfortunately, discrete devices are not so easily designed for. I must pick from an assortment of discrete devices, each with their own advantages. The most important parameter for all of these components is their ability to hold 3.5 Amps of current. Using a site like Digikey streamlines the process of narrowing down a selection, but the task is still daunting. That is the next step in the process.

Microelectronic Circuit Design, Richard Jaeger

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Electrical Design Engineer, Minneapolis, Minnesota